1. Field of the Invention
The present invention relates to an instrument and a method for determining duration at temperatures between a predetermined first temperature and a predetermined second temperature. Instruments and methods according to the present invention are useful, for instance, in the art of semiconductor packaging.
2. Description of Related Art
Interconnection and packaging related issues are among the main factors that determine not only the number of circuits that can be integrated on a chip, but also the performance of the chip. These issues have increased in importance as advances in chip design have led to reductions in the sizes of features on transistors and enlargements in chip dimensions. Industry has come to realize that merely having a fast chip will not result in a fast system; it must also be supported by equally fast and reliable packaging.
Essentially, packaging supplies the chip with signals and power, and performs other functions such as heat removal, physical support and protection from the environment. Another important function of the package is simply to redistribute the tightly packed I/Os off the chip to the I/Os of a printed wiring board.
An example of a package-chip system is the "flip-chip" integrated circuit mounted on a package substrate such as an area array organic package. Flip-chip mounting entails placing solder bumps on a die or chip, flipping the chip over, aligning the chip with the contact pads on a package substrate, and reflowing the solder balls in a furnace to establish bonding between the chip and the substrate. This method is advantageous in certain applications because the contact pads are distributed over the entire chip surface rather than being confined to the periphery as in wire bonding and most tape-automated bonding (TAB) techniques. As a result, the maximum number of I/O and power/ground terminals available can be increased, and signal and power/ground interconnections can be more efficiently routed on the chips. With flip-chip packaging, proper heating of the chip and the package is essential to ensure proper operation of the final assembly.
It is known in the prior art to combine multiple integrated circuit components on the same package. This is accomplished by placing plural integrated circuit components, such as bumped dice or chips off a single package substrate. The package is then heated in an oven where the solder bumps on the dice melt, creating an electrically conductive connection between the package and the dice.
The foregoing method has a disadvantage in that different integrated circuit components have widely varying heat capacities and heat coefficients. This means that some components reach reflow temperatures more quickly than others under the same heating conditions. If the oven temperature is set too low, some components will not reach reflow temperatures, and bonding will not occur between those components and the package substrate. On the other hand, if the oven temperature is set too high, some components will be heated to temperatures above the reflow temperature for too long a time, and thermally sensitive components, especially small components, will be damaged.
Accordingly, it is known in the prior art to use reflowing ovens having heating zones. In the prior art methods, the package and die or chip are placed on a boat, which is located on a conveyor. The conveyor carries the boat and the integrated circuit through the reflow oven. The oven has two or more zones which are held at different temperatures. In typical zone heating ovens, one zone is at a temperature, called a soak temperature, slightly below a solder reflow temperature, whereas a subsequent zone is held at a temperature slightly higher than a solder reflow temperature. Zone heating ovens allow the integrated circuit packages and dice or chips to reach temperatures somewhat below solder reflow temperatures, hereinafter soak temperature, before finally being heated to temperatures higher than solder reflow temperatures. A soak temperature is generally chosen to minimize the difference in time that each component must spend at temperatures greater than solder reflow temperatures to achieve bonding. This results in a reduction in the amount of thermal stress on all components, and in particular on temperature- sensitive components. Therefor, using a zone heating oven, it is possible to achieve complete bonding of all the integrated circuit components to the integrated circuit package substrate without the problem of overheating small and sensitive components.
While prior art methods allow for the various integrated circuit components to reach an intermediate temperature, such as a soak temperature, before heating them to a solder reflow temperature, prior art methods do not provide an instrument or method for accurately determining the length of time that an integrated circuit assembly spends at intermediate temperatures, such as soak temperatures. Information relating to duration of temperature at temperatures intermediate between a predetermined first and second temperature is increasingly desirable for optimal operation of reflow ovens, such as zone heating reflow ovens, because small and sensitive integrated circuit components are often sensitive to overlong exposure to even relatively low soak temperatures, which are below typical solder reflow temperatures. Moreover, information relating to duration at intermediate temperatures will vary with the particular number and type of components to be bonded to a package substrate, the size and composition of the package substrate, the age and condition of the reflow oven, etc. Furthermore, indicated reflow oven temperatures do not necessarily reflect accurately the actual temperature in the vicinity of an integrated circuit package assembly as it passes through each zone of the oven. Localized heat sinks (such as conveyors, boats, and other integrated circuit components), uneven heating by the oven's heating elements, and unequal dwell times in zones of an oven can cause variations in duration of heating at intermediate temperatures from one production run to another. Thus, the amount of time that an integrated circuit package assembly spends at a temperature intermediate between first and second predetermined temperatures is desirably determined empirically, and advantageously will be determined regularly, to ensure uniformity between production runs. However, the prior art does not provide a method for empirically, precisely and accurately determining the amount of time that an integrated circuit package assembly spends at a temperature intermediate between first and second predetermined temperatures. It thus remains a problem in the prior art that integrated circuit package assemblies may be held at temperatures above a first predetermined temperature longer than is optimal.
There thus remains a need in the art for a method and an instrument for accurately measuring and displaying the amount of time that an integrated circuit package spends at temperatures between a predetermined first temperature and a predetermined second temperature that is higher than the predetermined first temperature.